1. Field of the Invention
The present technology relates to a read operation performed in nonvolatile memory, and in particular relates to precharging particular bit lines of the nonvolatile memory.
2. Description of Related Art
FIG. 1 shows a prior art schematic of a circuit reading data stored on nonvolatile memory by precharging a bit line, and measuring the data with a sense amplifier and ground connected to other bit lines.
Nonvolatile memory cells M100, M101, M102, and M103 all have a gate connected to a common word line. The shown cells are part of a larger virtual ground array of nonvolatile memory cells. Circuitry 102 and 104 represent Y-pass and main bit line circuitry. The schematic of FIG. 1 shows in particular a read operation being performed on nonvolatile memory cell M100. To perform the read operation, circuitry 104 connects a bit line connected to the source of nonvolatile memory cell M100 to a ground voltage, and circuitry 102 connects a bit line connected to the drain of nonvolatile memory cell M100 to a sense amplifier 108. After the drain of nonvolatile memory cell M100 is sufficiently precharged, then the sense amplifier 108 measures the current I200 to determine the data value stored in nonvolatile memory cell M100.
In practice, the read operation in FIG. 1 has undesirable characteristics. There is no guarantee that the current measured by the sense amplifier 108 is equivalent to the current I200 flowing through the nonvolatile memory cell M100. If the voltages of other current carrying terminals of other nonvolatile memory cells is less than the precharge voltage of the drain of nonvolatile memory cell M100, then leakage current such as current I202 will result. For example, this leakage current can result from array data dependency, such as when a sensed memory cell has a neighboring memory cell with a very low threshold voltage. Such leakage current is undesirable, because the read margin of the sense amplifier is reduced. Accordingly, it would be desirable to reduce leakage current that occurs during a read operation.
One approach to decreasing leakage current is to precharge not just the bit line connected to the drain of the nonvolatile memory cell storing data to be read, but to precharge an additional bit line on the drain side of the nonvolatile memory cell storing values to be read. Precharging these additional bit lines results in a low voltage difference between these additional bit lines and the bit line connected to the drain of the nonvolatile memory cell storing data to be read. Due to the precharged additional bit line(s), leakage current is low, and the sense amplifier has a high read margin.
However, this approach to decreasing leakage current is still problematic. Power consumption is unnecessarily high, because bit lines are precharged other than the bit line connected to the drain of the nonvolatile memory cell storing data to be read. Also, the leakage current problem, rather than being eliminated, is simply moved, so that current is diverted not from the bit line connected to the drain of the nonvolatile memory cell storing data to be read, but from another bit line. This continued current leakage also represents a continuing issue with power consumption. Accordingly, it would be desirable to reduce power consumption during a read operation.